At the North American Technology Forum on April 23, 2025, TSMC officially unveiled its revolutionary A14 (1.4nm-class) process technology, leveraging second-generation GAAFET transistors and the NanoFlex Pro architecture. The technology achieves 10%-15% higher performance or 25%-30% lower power consumption compared to its 2nm (N2) process, alongside a 23% boost in logic density, specifically optimized for AI chips, high-performance computing (HPC), and mobile applications.
By dynamically configuring transistors to balance performance and energy efficiency, and introducing new design tools, A14 addresses cutting-edge demands in AI and autonomous systems. However, its incompatibility with N2P and A16 processes may accelerate client adoption of the platform.
Positioned as a direct competitor to Intel’s 14A (1.4nm) node, TSMC plans to mass-produce A14 in 2028, leveraging its foundry ecosystem strengths and partnerships with key clients like Apple and NVIDIA to meet next-generation product demands. This strategic move aims to solidify TSMC’s leadership in advanced node technology.
